FIELD OF THE INVENTION
The invention relates to a circuit for generating a temperature-stabilized reference voltage on a semiconductor chip.
Circuits of this type are known in semiconductor circuit engineering as bandgap reference (BGR) circuits. BGR circuits are used to a great extent as voltage references for operating voltages in analog, digital and mixed analog-digital circuits.
Conventional BGR circuits operate on the principle of the addition of two partial voltages with opposite temperature responses. While one partial voltage rises proportionately with the absolute temperature (PTAT partial voltage, also referred to as xe2x80x9cproportional to absolute temperaturexe2x80x9d), the other partial voltage falls as the temperature rises. By a suitably adjusted voltage divider, the two partial voltages are scaled in such a way that their temperature dependencies or temperature coefficients add when they are added to form the total voltage. This condition (temperature compensation) defines the level of the two partial voltages and has the effect that, by using this method (addition of two partial voltages), no reference voltages (that is to say operating voltage) below 1.2 V can be formed.
In recent times, CMOS fabrication processes have been discussed, with which circuits can be implemented which need operating voltages in the range of 1.1 V or below.
Reference voltages below 1.2 V can at present be implemented only by the xe2x80x9ccurrent-modexe2x80x9d technique. In this technique, two partial currents are added and converted into the reference voltage to be generated.
In the article titled xe2x80x9cA CMOS Bandgap Reference Circuit with Sub-1-V Operationxe2x80x9d, by H. Banba et al., IEEE JSSC, Vol. 34, pp. 670-674 (1999), a description is given of a BGR circuit which makes it possible to generate reference voltages as low as 0.9 V. In order to generate the two partial currents, use is made of a balanced circuit, the result of the special resistance wiring of the current branches of the balanced circuit achieving the situation where only one control loop is needed to generate the two partial currents. The control loop is implemented by a CMOS operational amplifier, whose inputs are connected to voltage taps on the two branches of the balanced circuit and whose output controls the gate terminals of both transistors in the balanced circuit. The disadvantages of this circuit are that, because of the offset of the CMOS operational amplifier, a low accuracy is achieved, and that the additional resistance wiring of the branches of the balanced circuit produces a relatively high required area.
In the article titled xe2x80x9cA 1.1 V Current-Mode and Piecewise-Linear Curvature-Corrected Bandgap Referencexe2x80x9d, by G. A. Rincon-Mora et al., IEEE JSSC, Vol. 33, pp. 1551-1554,(1998), a BGR circuit is described which, in order to achieve a reference voltage of 1.1 V, likewise uses the current-mode technique. Because of a curve correction to the output reference voltage, the circuit has a good accuracy and temperature stability. However, the drawback is the high expenditure on circuitry in the BGR circuit, and also the use of bipolar transistors, which cannot be produced with a cost-effect standard CMOS fabrication process.
In the article titled xe2x80x9cCMOS Voltage References Using Lateral Bipolar Transistorsxe2x80x9d, by M. G. R. Degrauwe et al., IEEE JSSC, Vol. 20, pp. 1151-1157 (1985), a BGR circuit is described in which CMOS-compatible lateral bipolar transistors are used in a reference amplifier to generate the reference voltage, see in particular FIG. 10. The drawback with this circuit is that, on account of the base-current compensation used and the fact that no current-mode technique is used, only operating voltages of 1.6 V and above are possible.
It is accordingly an object of the invention to provide a circuit for generating a reference voltage on a semiconductor chip which overcomes the above-mentioned disadvantages of the prior art devices of this general type, which is simple to construct and is suitable for generating a reference voltage below 1.2 V. In addition, the intention is also to achieve a high accuracy of the temperature compensation.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit for generating a temperature-stabilized reference voltage on a semiconductor chip, in which two partial currents with opposite temperature dependence are generated, superimposed on each other and converted into the reference voltage. The circuit contains a first circuit section formed as a differential amplifier having a common node and two lateral bipolar transistors for generating a first partial current. The two lateral bipolar transistors include a first lateral bipolar transistor and a second lateral bipolar transistor having a greater active area than the first lateral bipolar transistor, each of the two lateral bipolar transistors have an emitter terminal, a base terminal and a collector terminal.
A second circuit section for generating a second partial current is connected to the common node, and a component with an electrical resistance is disposed between the common node and the emitter terminal of the second lateral bipolar transistor with the greater area.
The circuit according to the invention operates on the current-mode technique, that is to say two partial currents with opposite temperature dependence are generated, superimposed on each other and converted into the reference voltage. One of the two partial currents, namely the PTAT partial current, is generated in a first circuit section of the circuit, which is formed in the form of a differential amplifier with two lateral bipolar transistors. The special feature of the differential amplifier is that one lateral bipolar transistor has a greater active area than the other lateral bipolar transistor, and that a component with an electrical resistance is disposed between the common node of the differential amplifier and the emitter terminal of the bipolar transistor with the greater area. These two measures (lateral bipolar transistors of different area and asymmetrical emitter wiring of the differential amplifier) have the effect of generating the PTAT partial current in a novel way, the partial current being composed of the two currents flowing through the lateral bipolar transistors.
The base terminals of both bipolar transistors are preferably connected to a common fixed potential, in particular ground. As a result (differing from the circuit described in the article by M. G. R. Degrauwe, in which the base terminals of the two lateral bipolar transistors are used as the input to the differential amplifier) an influence of unknown base currents is ruled out, which permits high accuracy of the temperature compensation and a low operating voltage.
A further preferred measure of the invention is distinguished by the fact that the second circuit section contains a first resistor, which is located between the common node of the differential amplifier and the fixed potential. By use of the first resistor, the second partial current is implicitly superimposed on the first partial current, the magnitude of the second partial current being proportional to the (controlled) potential at the common node of the asymmetric differential amplifier. This leads to a very simple and compact circuit, since a temperature-compensated reference current is generated with only one control loop and a minimum number of resistors (specifically only the first resistor).
In accordance with an added feature of the invention, a balanced circuit is connected to the differential amplifier and has a first branch through which a collector current of the first lateral bipolar transistor flows, and a second branch through which a collector current of the second lateral bipolar transistor flows.
In accordance with an additional feature of the invention, a further resistor is connected to the common fixed potential terminal. A further balanced circuit is provided and has a first branch feeding the common node and a second branch containing the further resistor disposed therein and across the further resistor the reference voltage is tapped off.
In accordance with another feature of the invention, the further balanced circuit performs 1:1 current balancing.
In accordance with a further feature of the invention, the further balanced circuit has a common control input. The further balanced circuit has two transistors each with a control terminal, one of the transistors is disposed in each of the first branch and the second branch. The control terminal of each of the transistors is connected to the common control input of the further balanced circuit. A control transistor having a control terminal is connected to the collector terminal of the second lateral bipolar transistor with the greater area. The control transistor is further connected to the common control input of the further balanced circuit.
In accordance with a concomitant feature of the invention, the base terminal of both of the two lateral polar transistors are connected to the common fixed potential terminal.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a circuit for generating a reference voltage on a semiconductor chip, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.